diff options
| -rw-r--r-- | src/codegen.zig | 16 |
1 files changed, 11 insertions, 5 deletions
diff --git a/src/codegen.zig b/src/codegen.zig index dd484b0..6b5fb1f 100644 --- a/src/codegen.zig +++ b/src/codegen.zig @@ -21,8 +21,7 @@ const Register = enum(u5) { } }; -const Opcode = u7; - +/// TODO: Panic on calls that become reserved hints, e.g. addw with rd=x0 const Instruction = packed union { r: R, i: I, @@ -31,6 +30,8 @@ const Instruction = packed union { u: U, j: J, + const Opcode = u7; + const R = packed struct(u32) { opcode: Opcode, rd: Register, @@ -619,7 +620,14 @@ const Context = struct { fn genProcCall(self: *Context, call: compile.Instr.ProcCall) !void { switch (call.proc) { .print => { - const num = self.register_allocator.get(call.arg); + const arg = self.register_allocator.get(call.arg); + + try self.freeUnusedVRegs(); + + const num = try self.register_allocator.allocateAux(); + defer self.register_allocator.freeAux(num); + + if (arg != num) try self.emit(.addi(num, arg, 0)); const quot = try self.register_allocator.allocateAux(); defer self.register_allocator.freeAux(quot); @@ -627,8 +635,6 @@ const Context = struct { defer self.register_allocator.freeAux(digit); const count = try self.register_allocator.allocate(call.dest); - try self.freeUnusedVRegs(); - try self.emit(.addi(digit, .zero, '\n')); try self.emit(.addi(.sp, .sp, -1)); try self.emit(.sb(.sp, 0, digit)); |